IBIS Macromodel Task Group Meeting date: 23 Aug 2011 Members (asterisk for those attending): Agilent: * Fangyi Rao * Radek Biernacki Altera: * David Banas Ansys: Samuel Mertens * Dan Dvorscak Curtis Clark Arrow Electronics: Ian Dodd Cadence Design Systems: Terry Jernberg * Ambrish Varma Celsionix: Kellee Crisafulli Cisco Systems: Ashwin Vasudevan Syed Huq Ericsson: Anders Ekholm IBM: Greg Edlund Intel: Michael Mirmak LSI Logic: Wenyi Jin Mentor Graphics: * John Angulo Zhen Mu * Arpad Muranyi Vladimir Dmitriev-Zdorov Micron Technology: Randy Wolff NetLogic Microsystems: Ryan Couts Nokia-Siemens Networks: * Eckhard Lenski QLogic Corp. * James Zhou Sigrity: Brad Brim * Kumar Keshavan Ken Willis SiSoft: * Walter Katz * Todd Westerhoff Doug Burns Snowbush IP: Marcus Van Ierssel ST Micro: Syed Sadeghi Teraspeed Consulting Group: Scott McMorrow Bob Ross TI: Casey Morrison Alfred Chong Vitesse Semiconductor: Eric Sweetman Xilinx: Mustansir Fanaswalla unaffiliated: * Mike LaBonte The meeting was lead by Arpad Muranyi ------------------------------------------------------------------------ Opens: - Mike: Can't find minutes from the last meeting - Arpad: We should have some kind of file for the meeting anyway - Arpad: DO we need to discuss the BIRD relating to GUI for corners? - Radek: We should leave that to users - Arpad: We can schedule it for the next meeting -------------------------- Call for patent disclosure: - None ------------- Review of ARs: Arpad update BIRD 127.2 - Done Walter update BIRD - Arpad start email thread about backchannel ------------- New Discussion: Walter showed "Compliant IBIS-AMI Models": - Slide 3: We will call jitter parameters "impairments", not parameters. - Kumar: If someone creates a CDR they should handle the whole job - Fangyi: Splitting jitters in the model is bad practice - Todd: If IBM gives us a jitter budget should we ignore it? - Kumar: Sinusoidal jitter is essential, it has to be included - The IBM simulator does include it in the time domain clock - Fangyi: It is a problem with all kinds of jitter - Todd: Is it the same for Rj? - Kumar: Rj is different, applied to the distribution as a post-process - Todd: What do we do with the data? - So Rx DCD and Sj should be in the DLL? - Fangyi and Kumar agreed - Todd: Anything Gaussian can be post-processed as a budget - Fangyi: We can define clock_times to include no Rj - Kumar: Rj can be included in time domain - Todd: These models suffer from a sample limit - Vendors may not want to rewrite their models - Fangyi: How to include CDR Rj? - It is included in clock_times - It has the same sample size problem - Todd: That is meant for the case of no clock_times at all - Walter: Rx clock recovery is really only for statistical - It does not include CDR Rj itself - Fangyi: The clock should include all of the Rj - Walter: In time domain there will be no clock recovery tails below 10e-6 probability - Fangyi: If you want to include real time Rj we should be consistent - Apply the same approach - Rj is included in clock_times in time domain - We should take Rj out - Kumar: CDR usually includes no jitter - Fangyi: It is better for the model to handle it - Walter: If the CDR has jitter the model maker would not set those parameters - They should be set only when the EDA tool should handle those jitter components - Fangyi: We should not encourage bad model practices - Walter: It is bad practice to incorporate jitter into the CDR - Fangyi: Why not use the same argument for Rx clock recovery? - Walter: Time domain has a fundamental limitation on Rj - It does not handle the tails - Fangyi: Rj is always post-processing - Todd: Even without a clock I can show what the clock looks like with jitter - Fangyi: That will break the model - Ambrish: Statistical will never have that noise implemented - It will be approximate - Todd: RX Rj was meant to be a budget - It would show as a colored area - Fangyi: We need two Rj parameters, one for TD one for statistical - Statistical is total Rj - Kumar: That would be clear - Walter: RX Rj applies to both TD and stat - Question is whether there is an additional Rj for clock recovery - 5.0 has Rj, confusing that it is combined with Dj - Kumar: This can be slit into two cases - Ambrish: You might be double counting - Kumar: Two AMI files can be provided - One for TD, one for stat - Walter: Nothing else requires two files - Todd: I need to know two budgets - Fangyi: Budget is not intrinsic to Rx model - Ambrish: This is basically documentation more than for modeling - Todd: Si MFGs make this part of Si characterization - Mostly the IO decap structures are characterized - No one will analyze the whole IO structure - SO they give us a budget - Fangyi: It is documentation - Todd: Why make the user type into a GUI? - The tool should know what to do - The models should drop in and work - Fangyi; It is an external impairment - Walter: Only if it is a forwarded clock - Otherwise it is internal - Todd: All HF power noise probably is generated on die - James: Random jitter is usually from thermal noise - It would be difficult for the user to type in a number - Todd: A lot of effort has gone into validating the Si data - The jitter data are from that - Kumar: It is no problem if it is simple - A complex CDR is a problem - Walter: Modern receivers have forwarded clocks - Why do we need this? - The CDR uses clock_times as a reference clock - Kumar: The forwarded clock is much slower than the CDR clock - Walter: Should we keep this in the BIRD? - Arpad: Clock_times should be a separated BIRD - Walter: I will only submit BIRDs I can support AR: Walter update BIRD AR: Arpad start a new clock_times BIRD Meeting ended. ------------- Next meeting: 30 Aug 2011 12:00pm PT Next agenda: 1) Task list item discussions ------------- IBIS Interconnect SPICE Wish List: 1) Simulator directives